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VERIFICATION TECHNIQUES FOR SYSTEM-LEVEL DESIGN
Material type:
TextPublication details: MORGAN KAUFMANN PUBLISHERS; 2011Description: 240 PISBN: - 9780123706164
- 621.3815 FJU
| Item type | Current library | Call number | Status | Notes | Date due | Barcode | |
|---|---|---|---|---|---|---|---|
| Reference | VIT Central Library | 621.3815 FJU (Browse shelf(Opens below)) | Not for loan | ELECTRONICS | 35845 |
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| 621.395 FIO OP AMPS AND LINEAR INTEGRATED CIRCUITS | 621.395 JAM OP AMPS AND LINEAR INTEGRATED CIRCUITS | 621.3815 FIT ANALOG DESIGN AND SIMULATION USING OR CAD CAPTURE AND PSPICE | 621.3815 FJU VERIFICATION TECHNIQUES FOR SYSTEM-LEVEL DESIGN | 621.3815 FLE ENGINEERING APPROACH TO DIGITAL DESIGN | 621.3815 FLE ENGINEERING APPROACH TO DIGITAL DESIGN | 621.3815 FLE ENGINEERING APPROACH TO DIGITAL DESIGN |
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